Static random-access memory (SRAM) is a type of volatile memory used in computing systems. SRAM is faster than other kinds of memory. For this reason, SRAM is typically used in high-speed caches for central processing units (CPUs), while other types of volatile memory such as dynamic random access memory (DRAM) is typically used in the main memory of a computer.
Typically, a low swing SRAM read circuit has a P-type metal-oxide-semiconductor (PMOS) pass gate between an array bit cell (i.e., memory cell) and a sensing circuit (e.g., sense amplifier). The PMOS pass gate provides isolation between the array bit lines and the sense lines, and often functions as a column multiplexer as well. The PMOS pass gate has a threshold drop across the device when passing a low signal. Hence, the sense lines saturate at a threshold voltage (Vt) above a ground supply voltage (VSS).
Control signals of an SRAM circuit are typically sequenced to enable reading of the SRAM. The control signals may include, for example, a word line, a row column select signal, a sense amplifier enable signal, and a precharge signal. The array bit cell must pull the sense nodes low enough to establish the required differential voltage for correct sensing when the sense amplifier enable signal goes high.
Lowering the power consumption of mobile devices, such as smart phones, increases the battery life and operating timeframes between charges. One way to lower the power consumption is to lower a power supply voltage (VDD). However, as the power supply voltage VDD provided to a SRAM circuit is decreased, the ability to pull the sense node low enough for proper sensing through the PMOS pass gate is limited by the device threshold voltage (Vt). This limits the lowest operating voltage, or VMIN, of the memory, and ultimately of the product.